
Performance Modeling Computer Architect - Paperback
$98.99
$106.95
-7%Quantity
01
Pay over time for orders over $35.00 with
Offers & Perks
Earn 98 points with this purchase
Added to your rewards balance after checkout.
100 points welcome bonus
Create an account and start with extra points.
Languages:EnglishPublisher:Wiley-IEEE Computer Society PRISBN-13:9780818670947ISBN-10:0818670940UPC:9780818670947Book Category:ComputersBook Subcategory:Computer Science, Networking, LanguagesSize:10.83 x 8.54 x 0.98 inchesWeight:0.935Product ID:SCWN1AJ64A
As computers become more complex, the number and complexity of the tasks facing the computer architect have increased. Computer performance often depends in complex way on the design parameters and intuition that must be supplemented by performance studies to enhance design productivity.
This book introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. It discusses the development of performance models based on queuing theory and probability. The text also shows how they are used to provide quick approximate calculations to indicate basic performance tradeoffs and narrow the range of parameters to consider when determining system configurations. It illustrates how performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field to understand the papers in this volume is not required.
This book introduces computer architects to computer system performance models and shows how they are relatively simple, inexpensive to implement, and sufficiently accurate for most purposes. It discusses the development of performance models based on queuing theory and probability. The text also shows how they are used to provide quick approximate calculations to indicate basic performance tradeoffs and narrow the range of parameters to consider when determining system configurations. It illustrates how performance models can demonstrate how a memory system is to be configured, what the cache structure should be, and what incremental changes in cache size can have on the miss rate. A particularly deep knowledge of probability theory or any other mathematical field to understand the papers in this volume is not required.
Languages:EnglishPublisher:Wiley-IEEE Computer Society PRISBN-13:9780818670947ISBN-10:0818670940UPC:9780818670947Book Category:ComputersBook Subcategory:Computer Science, Networking, LanguagesSize:10.83 x 8.54 x 0.98 inchesWeight:0.935Product ID:SCWN1AJ64A
C. Mani Krishna is Professor of Electrical and Computer Engineering at the University of Massachusetts, Amherst. He received his PhD in Electrical Engineering from the University of Michigan in 1984.
Publisher: Wiley-IEEE Computer Society PR
Contributor(s)
Free shipping on orders over $75. Standard shipping takes 3-7 business days. Eligible items may be returned within 30 days of delivery. Conditions apply.
