The UVM Primer: A Step-by-Step Introduction to the Universal Verification Methodology - Paperback
by Ray Salemi
$41.99
$47.95
-12%Quantity
01
Pay over time for orders over $35.00 with
Language:EnglishPublisher:Boston Light PressISBN-13:9780974164939ISBN-10:974164933UPC:9780974164939Book Category:ComputersBook Subcategory:Computer EngineeringSize:11.02 x 8.50 x 0.42 inchesWeight:1.0318Product ID:SCNJZKT9ZE
The UVM Primer: A Step-by-Step Introduction to the Universal Verification Methodology
The UVM Primer uses simple, runnable code examples, accessible analogies, and an easy-to-read style to introduce you to the foundation of the Universal Verification Methodology. You will learn the basics of object-oriented programming with SystemVerilog and build upon that foundation to learn how to design testbenches using the UVM. Use the UVM Primer to brush up on your UVM knowledge before a...
Language:EnglishPublisher:Boston Light PressISBN-13:9780974164939ISBN-10:974164933UPC:9780974164939Book Category:ComputersBook Subcategory:Computer EngineeringSize:11.02 x 8.50 x 0.42 inchesWeight:1.0318Product ID:SCNJZKT9ZE
Ray Salemi is a senior verification consultant with Mentor Graphics. Salemi started his career in Electronic Design Automation with Gateway Design Automation, the inventors of Verilog. Since then he has worked for Cadence Design Systems, Sun Microsystems, and several startups. Ray Salemi is the author of the popular introduction to simulation, FPGA SIMULATION.
Publisher: Boston Light Press
Contributor(s)
Author
Free shipping on orders over $75. Standard shipping takes 3-7 business days. Returns accepted within 30 days of purchase.